Epson S1D13704 Manuals

Manuals and User Guides for Epson S1D13704. We have 1 Epson S1D13704 manual available for free PDF download: Technical Manual

Epson S1D13704 Technical Manual (420 pages)

Embedded Memory Color LCD Controller

Brand: Epson | Category: Controller | Size: 4.04 MB

Table of Contents

11
Table of Contents

99
- 1 Introduction
  
  103
- 2 Initialization
  
  104
  - Frame Rate Calculation
    105
- 3 Memory Models
  
  107
  - Display Buffer Location
    107
    
    Bit-Per-Pixel (2 Colors/Gray Shades)
    107
    
    Bit-Per-Pixel (16 Colors/Gray Shades)
    108
    
    Bit-Per-Pixel (4 Colors/Gray Shades)
    108
    
    Eight Bit-Per-Pixel (256 Colors)
    109
- 4 Look-Up Table (LUT)
  
  110
  - Look-Up Table Registers
    110
  - Look-Up Table (LUT) Organization
    115
- 5 Advanced Techniques
  
  121
  - Virtual Display
    121
    
    Examples
    122
    
    Registers
    122
    
    Examples
    124
    
    Registers
    124
  - Split Screen
    126
    
    Registers
    127
    
    Examples
    128
- 6 LCD Power Sequencing and Power Save Modes
  
  130
  - LCD Power Sequencing
    130
  - Registers
    130
  - LCD Enable/Disable
    131
- 7 Swivelview
  
  132
  - Introduction to Swivelview
    132
  - Default Swivelview Mode
    132
  - Alternate Swivelview Mode
    133
  - Registers
    135
  - Limitations
    137
  - Examples
    138
- 8 Identifying the S1D13704
  
  142
- 9 Hardware Abstraction Layer (HAL)
  
  143
  - Introduction
    143
  - API for 13704HAL
    143
    
    Initialization
    143
    
    Miscellaneous HAL Support
    145
    
    Advanced HAL Functions
    148
    
    Register / Memory Access
    151
    
    Drawing
    154
    
    Power Save
    154
    
    LUT Manipulation
    155
- 10 Sample Code
  
  157
  - Introduction
    157
    
    Sample Code Using the S1D13704 HAL API
    157
    
    Sample Code Without Using the S1D13704 HAL API
    160
    
    Header Files
    168
Table of Contents

181
- Introduction
  
  183
- Program Requirements
  
  184
  - Installation
    184
  - Usage
    184
  - 13704Cfg
    185
  - Panel Information
    186
  - System
    189
  - LUT Control
    190
  - Open
    191
  - Save
    192
  - Help
    193
  - Exit
    193
- Comments
  
  194
Table of Contents

235
- 1 Introduction
  
  239
  - Features
    239
- 2 Installation and Configuration
  
  240
- 3 LCD Interface Pin Mapping
  
  242
- 4 Cpu/Bus Interface Connector Pinouts
  
  243
- 5 Host Bus Interface Pin Mapping
  
  245
- 6 Technical Description
  
  246
  - ISA Bus Support
    246
    
    Display Adapter Card Support
    246
    
    Expanded Memory Manager
    246
  - Non-ISA Bus Support
    247
  - Embedded Memory Support
    247
    
    Decode Logic
    247
  - Clock Input Support
    248
  - LCD Panel Voltage Setting
    248
  - Monochrome LCD Panel Support
    248
    
    Color Passive LCD Panel Support
    248
    
    Color TFT/D-TFD LCD Panel Support
    248
  - Power Save Modes
    249
  - Adjustable LCD Panel Negative Power Supply
    249
  - Adjustable LCD Panel Positive Power Supply
    249
  - Cpu/Bus Interface Header Strips
    250
- 7 Parts List
  
  251
- 8 Schematic Diagrams
  
  252
This Page Left Blank

259
- 1 Introduction
  
  263
  - General Description
    263
- 2 Direct Connection to the Toshiba TX3912
  
  264
  - General Description
    264
  - Memory Mapping and Aliasing
    265
  - S1D13704 Configuration and Pin Mapping
    265
- 3 System Design Using the ITE IT8368E PC Card Buffer
  
  266
  - Hardware Description
    266
  - IT8368E Configuration
    267
  - Memory Mapping and Aliasing
    268
  - S1D13704 Configuration
    269
- 4 Software
  
  270
  - EPSON LCD Controllers (S1D13704)
    271
  - Toshiba MIPS TX3912 Processor
    271
Table of Contents

281
- 1 Introduction
  
  285
- 2 Interfacing to the MC68328
  
  286
  - The MC68328 System Bus
    286
  - Chip-Select Module
    286
- 3 S1D13704 Host Bus Interface
  
  287
  - Bus Interface Modes
    287
  - Generic #1 Interface Mode
    288
  - MC68K #1 Interface Mode
    289
- 4 MC68328 to S1D13704 Interface
  
  290
- 5 Software
  
  293
- 6 References
  
  294
  - Documents
    294
  - Document Sources
    294
Table of Contents

299
- 1 Introduction
  
  303
- 2 Interfacing to the NEC VR4102
  
  304
  - The NEC VR4102 System Bus
    304
    
    Overview
    304
    
    LCD Memory Access Cycles
    305
- 3 S1D13704 Host Bus Interface
  
  306
  - Bus Interface Modes
    306
  - Generic #2 Interface Mode
    307
- 4 VR4102 to S1D13704 Interface
  
  309
  - Hardware Description
    309
  - S1D13704 Hardware Configuration
    310
  - NEC VR4102 Configuration
    311
- 5 Software
  
  312
Table of Contents

317
- 1 Introduction
  
  321
- 2 Interfacing to the PC Card Bus
  
  322
  - The PC Card System Bus
    322
    
    Memory Access Cycles
    322
    
    PC Card Overview
    322
- 3 S1D13704 Bus Interface
  
  324
  - Bus Interface Modes
    324
  - Generic #1 Interface Mode
    325
- 4 PC Card to S1D13704 Interface
  
  326
  - Hardware Connections
    326
  - S1D13704 Hardware Configuration
    327
  - PAL Equations
    328
  - Register/Memory Mapping
    328
- 5 Software
  
  329
Table of Contents

335
- 1 Introduction
  
  339
- 2 Interfacing to the MPC821
  
  340
  - The Mpc8Xx System Bus
    340
  - MPC821 Bus Overview
    340
    
    Normal (Non-Burst) Bus Transactions
    341
    
    Burst Cycles
    342
  - Memory Controller Module
    343
    
    General-Purpose Chip Select Module (GPCM)
    343
    
    User-Programmable Machine (UPM)
    344
- 3 S1D13704 Host Bus Interface
  
  345
  - Host Bus Interface Modes
    345
  - Generic #1 Host Bus Interface Mode
    346
- 4 MPC821 to S1D13704 Interface
  
  347
  - Hardware Description
    347
  - S1D13704 Hardware Configuration
    350
  - MPC821 Chip Select Configuration
    351
  - Test Software
    352
- 5 Software
  
  354
Table of Contents

359
- 1 Introduction
  
  363
- 2 Interfacing to the MCF5307
  
  364
  - The MCF5307 System Bus
    364
    
    Normal (Non-Burst) Bus Transactions
    364
    
    Overview
    364
    
    Burst Cycles
    365
  - Chip-Select Module
    366
- 3 S1D13704 Bus Interface
  
  367
  - Bus Interface Modes
    367
  - Generic #1 Interface Mode
    368
- 4 MCF5307 to S1D13704 Interface
  
  369
  - Hardware Description
    369
  - S1D13704 Hardware Configuration
    370
  - MCF5307 Chip Select Configuration
    371
- 5 Software
  
  372
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377
- 1 Introduction
  
  381
  - General Description
    381
- 2 Direct Connection to the Philips PR31500/PR31700
  
  382
  - General Description
    382
  - Memory Mapping and Aliasing
    383
  - S1D13704 Configuration and Pin Mapping
    383
- 3 System Design Using the ITE IT8368E PC Card Buffer
  
  384
  - Hardware Description
    384
  - IT8368E Configuration
    385
This Page Left Blank

393
- 1 Introduction
  
  397
  - General Description
    397
- 2 S1D13704/5 Bus Interface
  
  398
  - Bus Interface Modes
    398
  - Generic #2 Interface Mode
    399
- 3 TMPR3912/22U and S1D13704/5 Interface
  
  400
  - Hardware Connections
    400
  - Memory Mapping and Aliasing
    401
  - S1D13704/5 Configuration and Pin Mapping
    401
- 4 CPU Module Description
  
  402
  - Clock Signals
    402
    
    Busclk
    402
    
    Clki
    402
  - LCD Connectors
    402
    
    50-Pin LCD Module Connector, J3
    402
    
    Standard Epson LCD Connector, J4
    403
  - LCD Controller
    403
    
    LCDPWR Polarity
    403
    
    S1D13704 Vs. S1D13705
    403
    
    S1D13704\75 Chip Select
    403
  - Introduction
    411
  - Interfacing to an 8-Bit Processor
    412
    
    The Generic 8-Bit Processor System Bus
    412
  - S1D13704 Bus Interface
    413
    
    Host Bus Pin Connection
    413
    
    Generic #2 Interface Mode
    414
  - 8-Bit Processor to S1D13704 Interface
    415
    
    Hardware Description
    415
    
    Register/Memory Mapping
    416
    
    S1D13704 Hardware Configuration
    416
  - Software
    417

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Epson S1D13704 Technical Manual (420 pages)

Table of Contents

Table of Contents

1 Introduction

2 Features

3 Typical System Implementation Diagrams

4 Functional Block Diagram

5 Pins

6 C. Characteristics

7 C. Characteristics

8 Registers

10 Display Data Formats

14 Mechanical Data

Table of Contents

1 Introduction

2 Initialization

3 Memory Models

4 Look-Up Table (LUT)

5 Advanced Techniques

6 LCD Power Sequencing and Power Save Modes

7 Swivelview

8 Identifying the S1D13704

9 Hardware Abstraction Layer (HAL)

10 Sample Code

Table of Contents

Introduction

Program Requirements

Comments

Table of Contents

1 Introduction

2 Installation and Configuration

3 LCD Interface Pin Mapping

4 Cpu/Bus Interface Connector Pinouts

5 Host Bus Interface Pin Mapping

6 Technical Description

7 Parts List

8 Schematic Diagrams

This Page Left Blank

1 Introduction

2 Direct Connection to the Toshiba TX3912

3 System Design Using the ITE IT8368E PC Card Buffer

4 Software

Table of Contents

1 Introduction

2 Interfacing to the MC68328

3 S1D13704 Host Bus Interface

4 MC68328 to S1D13704 Interface

5 Software

6 References

Table of Contents

1 Introduction

2 Interfacing to the NEC VR4102

3 S1D13704 Host Bus Interface

4 VR4102 to S1D13704 Interface

5 Software

Table of Contents

1 Introduction

2 Interfacing to the PC Card Bus

3 S1D13704 Bus Interface

4 PC Card to S1D13704 Interface

5 Software

Table of Contents

1 Introduction

2 Interfacing to the MPC821

3 S1D13704 Host Bus Interface

4 MPC821 to S1D13704 Interface

5 Software

Table of Contents

1 Introduction

2 Interfacing to the MCF5307

3 S1D13704 Bus Interface

4 MCF5307 to S1D13704 Interface

5 Software

This Page Left Blank

1 Introduction

2 Direct Connection to the Philips PR31500/PR31700

3 System Design Using the ITE IT8368E PC Card Buffer

This Page Left Blank

1 Introduction