Fujitsu MB90460 Series Manuals

Manuals and User Guides for Fujitsu MB90460 Series. We have 1 Fujitsu MB90460 Series manual available for free PDF download: Hardware Manual

Fujitsu MB90460 Series Hardware Manual (739 pages)

F2MC-16LX 16-BIT MICROCONTROLLER

Brand: Fujitsu | Category: Microcontrollers | Size: 6.21 MB

Table of Contents
10
Chapter 1 Overview

20
- MB90460/465 Series Features
  21
- MB90460/465 Series Product Line-Up
  24
- Block Diagram of MB90460/465 Series
  26
- Pin Assignment
  27
- Package Dimensions
  30
- I/O Pins and Pin Functions
  33
- I/O Circuit Types
  38
Chapter 2 Notes on Handling Devices

42
- Notes on Handling Devices
  43
Chapter 3 Cpu

46
- Cpu
  47
- Memory Space
  48
- Memory Maps
  50
- Addressing
  52
  - Address Specification by Linear Addressing
    53
  - Address Specification by Bank Addressing
    54
- Memory Location of Multi-Byte Data
  56
- Registers
  58
- Dedicated Registers
  59
- General-Purpose Registers
  74
- Prefix Codes
  76
Chapter 4 Reset

84
- Reset
  85
- Reset Causes and Oscillation Stabilization Wait Intervals
  87
- External Reset Pin
  88
- Reset Operation
  90
- Reset Cause Bits
  92
- Status of Pins in a Reset
  94
Chapter 5 Clock

96
Chapter 6 Low Power Consumption Mode

108
- Low Power Consumption Mode
  109
- Block Diagram of the Low Power Consumption Control Circuit
  111
- Low Power Consumption Mode Control Register (LPMCR)
  113
- CPU Intermittent Operation Mode
  116
- Standby Mode
  117
  - Sleep Mode
    118
  - Time-Base Timer Mode
    121
  - Stop Mode
    123
- State Change Diagram
  125
- State of Pins in Standby Mode and During Reset
  128
- Usage Notes on Low Power Consumption Mode
  129
Chapter 7 Interrupt

132
Chapter 8 Mode Setting

176
- Mode Setting
  177
- Mode Pins (MD2 to MD0)
  178
- Mode Data
  179
Chapter 9 I/O Port

182
- Overview of I/O Port
  183
- Registers of I/O Port
  185
- Port 0
  186
  - Port 0 Registers (PDR0, DDR0 and RDR0)
    188
  - Operation of Port 0
    190
- Port 1
  192
  - Port 1 Registers (PDR1, DDR1 and RDR1)
    194
  - Operation of Port 1
    195
- Port 2
  197
  - Port 2 Registers (PDR2 and DDR2)
    199
  - Operation of Port 2
    200
- Port 3
  202
  - Port 3 Registers (PDR3 and DDR3)
    204
  - Operation of Port 3
    205
- Port 4
  207
  - Port 4 Registers (PDR4 and DDR4)
    209
  - Operation of Port 4
    210
- Port 5
  212
  - Port 5 Registers (PDR5, DDR5 and ADER)
    214
  - Operation of Port 5
    215
- Port 6
  217
  - Port 6 Registers (PDR6 and DDR6)
    219
  - Operation of Port 6
    220
- Sample I/O Port Program
  222
Chapter 10 Time-Base Timer

224
Chapter 11 Watchdog Timer

238
Chapter 12 16-Bit Reload Timer

248
Chapter 13 16-Bit Ppg Timer

276
Chapter 14 Multi-Functional Timer

298
Chapter 15 Multi-Pulse Generator

374
CHAPTER 16 PWC Timer

452
- Overview of the PWC Timer
  453
- Block Diagram of the PWC Timer
  454
- PWC Timer Pins
  455
- PWC Timer Registers
  457
- PWC Timer Interrupts
  464
- Operation of the PWC Timer
  466
- Usage Notes on the PWC Timer
  480
- Sample Programs for the PWC Timer
  483
Chapter 17 Uart

486
Chapter 18 Dtp/External Interrupt Circuit

532
Chapter 19 Delayed Interrupt Generator Module

554
Chapter 20 8/10-Bit A/D Converter

561
Chapter 21 Rom Correction Function

590
Chapter 22 Rom Mirroring Function Selection Module

602
- Overview of the ROM Mirroring Function Selection Module
  603
- ROM Mirroring Function Selection Register (ROMM)
  604
Chapter 23 512K / 1024K Bit Flash Memory

606
Chapter 24 Example of F

634
Appendix

646
- Appendix A I/O Map
  
  647
- APPENDIX B Instructions
  
  654
  - Instruction Types
    655
  - Addressing
    656
  - Direct Addressing
    658
  - Indirect Addressing
    664
  - Execution Cycle Count
    672
  - Effective Address Field
    675
  - How to Read the Instruction List
    676
  - F 2 MC-16LX Instruction List
    679
  - Instruction Map
    693
Index

716

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Fujitsu MB90460 Series Manuals

Fujitsu MB90460 Series Hardware Manual (739 pages)

Table of Contents

Chapter 1 Overview

Chapter 2 Notes on Handling Devices

Chapter 3 Cpu

Chapter 4 Reset

Chapter 5 Clock

Chapter 6 Low Power Consumption Mode

Chapter 7 Interrupt

Chapter 8 Mode Setting

Chapter 9 I/O Port

Chapter 10 Time-Base Timer

Chapter 11 Watchdog Timer

Chapter 12 16-Bit Reload Timer

Chapter 13 16-Bit Ppg Timer

Chapter 14 Multi-Functional Timer

Chapter 15 Multi-Pulse Generator

CHAPTER 16 PWC Timer

Chapter 17 Uart

Chapter 18 Dtp/External Interrupt Circuit

Chapter 19 Delayed Interrupt Generator Module

Chapter 20 8/10-Bit A/D Converter

Chapter 21 Rom Correction Function

Chapter 22 Rom Mirroring Function Selection Module

Chapter 23 512K / 1024K Bit Flash Memory

Chapter 24 Example of F

Appendix

Appendix A I/O Map

APPENDIX B Instructions

Index

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