Fujitsu MB91460 SERIES FR60 Manuals

Manuals and User Guides for Fujitsu MB91460 SERIES FR60. We have 1 Fujitsu MB91460 SERIES FR60 manual available for free PDF download: User Manual

Fujitsu MB91460 SERIES FR60 User Manual (1038 pages)

32-BIT MICROCONTROLLER

Brand: Fujitsu | Category: Computer Hardware | Size: 11.01 MB

Table of Contents
5
Chapter 1 Introduction

17
- How to Handle the Device
  17
- Instruction for Users
  19
- Caution: Debug-Related Matters
  22
- How to Use this Document
  23
Chapter 2 MB91460 Rev.a/Rev.b Overview

27
- Overview
  27
- Features
  27
- MB91460 Series Product Lineup
  35
- Block Diagram
  37
Chapter 3 MB91460 Series Basic Information

39
- Memory Map
  39
- I/O Map
  40
- Interrupt Vector Table
  89
- Package
  94
- Pin Assignment Diagram
  95
- Pin Definitions
  96
- I/O Circuit Type
  110
- Pin State Table
  112
Chapter 4 CPU Architecture

121
- Overview
  121
- Features
  122
- Cpu
  123
- Bit/16-Bit Bus Converter
  123
- Harvard/Princeton Bus Converter
  123
- Instruction Overview
  124
- Data Structure
  125
- Word Alignment
  126
- Addressing
  127
Chapter 5 CPU Registers

129
- General-Purpose Registers
  129
- Dedicated Registers
  129
Chapter 6 EIT: Exceptions, Interrupts and Traps

137
- Overview
  137
- Features
  137
- EIT Trigger
  137
- Return from EIT
  137
- EIT Interrupt Level
  138
- EIT Vector Table
  138
- Multiple EIT Processing
  139
- Operation
  141
- Caution
  144
Chapter 7 Branch Instruction

145
Chapter 8 Device State Transition

149
- Overview
  149
- Features
  149
- State Transition Diagram
  150
Chapter 9 Reset

155
- Overview
  155
- Features
  155
- Configuration
  156
- Registers
  157
- INIT Pin Input (INIT: Settings Initialization Reset)
  162
- Watchdog Reset (INIT: Settings Initialization Reset)
  164
- Software Reset (RST: Operation Initialization Reset)
  165
- Reset Operation Modes
  166
- MCU Operation Mode
  167
- Caution
  168
Chapter 10 Standby

171
- Overview
  171
- Features
  171
- Configuration
  172
- Registers
  173
- Operation
  175
- Settings
  177
- Caution
  181
Chapter 11 Memory Controller

183
- Overview
  183
- FLASH Interface
  183
- General Purpose RAM
  183
- Instruction Cache and Data Buffer
  183
- Prefetch
  183
- Fixed Mode and Reset Vectors
  183
- Registers
  184
- Explanations of Registers
  185
Chapter 12 Instruction Cache

195
- General Description
  195
- Main Body Structure
  195
- Operating Mode Conditions
  201
- Cacheable Areas in the Instruction Cache
  202
- Settings for Handling the I-Cache
  202
Chapter 13 Clock Control

205
- Overview
  205
- Features
  205
- Configuration
  206
- Registers
  207
- Operation
  215
- Settings
  217
- Caution
  221
Chapter 14 PLL Interface

223
- Overview
  223
- Features
  223
- Frequency Calculation
  223
- Registers
  224
- Recommended Settings
  228
- Clock Auto Gear Up/Down
  229
- Caution
  231
Chapter 15 CAN Clock Prescaler

233
- Overview
  233
- Features
  233
- Registers
  234
Chapter 16 Clock Supervisor

237
- Overview Clock Supervisor
  237
- Clock Supervisor Register
  238
- Block Diagram Clock Supervisor
  240
- Operation Modes
  241
- Stop Mode
  252
Chapter 17 Clock Modulator

255
- Overview
  255
- Clock Modulator Registers
  256
- Application Note
  263
Chapter 18 Timebase Counter

265
- Overview
  265
- Features
  265
- Configuration
  266
- Registers
  267
- Operation
  269
- Settings
  275
- Caution
  278
Chapter 19 Timebase Timer

279
- Overview
  279
- Features
  279
- Configuration
  280
- Register
  281
- Operation
  283
- Setting
  284
- Caution
  287
Chapter 20 Software Watchdog Timer

289
- Overview
  289
- Features
  289
- Configuration
  290
- Register
  291
- Operation
  294
- Setting
  296
- Caution
  298
Chapter 21 Hardware Watchdog Timer

299
- Overview
  299
- Configuration
  300
- Register
  301
- Functions
  303
- Caution
  304
Chapter 22 Main Oscillation Stabilisation Timer

305
- Overview
  305
- Features
  305
- Configuration
  306
- Register
  307
- Operation
  308
- Setting
  310
- Caution
  313
Chapter 23 Sub Oscillation Stabilisation Timer

315
- Overview
  315
- Features
  315
- Configuration
  316
- Register
  317
- Operation
  319
- Setting
  322
- Caution
  325
Chapter 24 Interrupt Control

327
- Overview
  327
- Features
  327
- Configuration
  328
- Registers
  329
- Interrupt Vector
  333
- Operation
  334
- Setting
  335
- Caution
  336
Chapter 25 External Interrupt

337
- Overview
  337
- Features
  337
- Configuration
  338
- External Interrupts
  339
- Registers
  341
- Operation
  343
- Setting
  344
- Interrupt Types
  345
- Caution
  347
Chapter 26 DMA Controller

349
- Overview of the DMA Controller (DMAC)
  349
- DMA Controller (DMAC) Registers
  351
- DMA Controller (DMAC) Operation
  370
- Operation Flowcharts
  389
- Data Bus
  392
- DMA External Interface
  395
Chapter 27 Delayed Interrupt

399
- Overview
  399
- Features
  399
- Configuration
  399
- Register
  400
- Operation
  400
- Setting
  401
- Caution
  401
Chapter 28 Bit Search

403
- Overview
  403
- Features
  403
- Configuration
  404
- Register
  405
- Operation
  407
- Setting
  409
- Caution
  411
Chapter 29 MPU / EDSU

413
- Overview
  413
- Features
  414
- Break Functions
  415
- Memory Protection
  420
- Registers
  423
- Quick Reference
  445
Chapter 30 I/O Ports

447
- I/O Ports Functions
  447
- I/O Circuit Types
  469
- Port Register Settings
  470
Chapter 31 External Bus

523
- Overview of the External Bus Interface
  523
- External Bus Interface Registers
  528
- Setting Example of the Chip Select Area
  558
- Endian and Bus Access
  559
- Operation of the Ordinary Bus Interface
  578
- Burst Access Operation
  590
- Address/Data Multiplex Interface
  592
- Prefetch Operation
  595
- SDRAM/FCRAM Interface Operation
  598
- Self Refresh
  600
- DMA Access Operation
  608
- Bus Arbitration
  624
- Procedure for Setting a Register
  626
- Notes on Using the External Bus Interface
  627
Chapter 32 USART (LIN / FIFO)

629
- Overview
  629
- Usart Interrupts
  631
- USART Configuration
  632
- USART Pins
  636
- USART Registers
  637
- USART Interrupts
  654
  - Reception Interrupt Generation and Flag Set Timing
    656
  - Transmission Interrupt Generation and Flag Set Timing
    657
- USART Baud Rates
  658
  - Setting the Baud Rate
    659
  - Restarting the Reload Counter
    661
- USART Operation
  663
  - Error Detection
    667
  - Direct Access to Serial Pins
    670
- Notes on Using USART
  679
Chapter 33 I2C Controller

681
- Overview
  681
- I2C Interface Registers
  683
- I2C Interface Operation
  701
- Programming Flow Charts
  703
Chapter 34 CAN Controller

707
- Overview
  707
- Register Description
  708
- Functional Description
  736
- CAN Application
  740
Chapter 35 Free-Run Timer

749
- Overview
  749
- Features
  749
- Configuration Diagram
  750
- Registers
  751
- Operation
  755
- Setting
  757
- Caution
  761
Chapter 36 Input Capture

763
- Overview
  763
- Features
  763
- Configuration
  764
- Register
  765
- Operation
  768
- Settings
  770
- Caution
  774
Chapter 37 Output Compare

775
- Overview
  775
- Features
  775
- Configuration Diagram
  776
- Registers
  777
- Operation
  781
- Settings
  783
- Caution
  789
Chapter 38 Reload Timer

791
- Overview
  791
- Features
  791
- Configuration
  792
- Registers
  794
- Operation
  798
- Setting
  803
- Caution
  810
Chapter 39 Programmable Pulse Generator

811
- Overview
  811
- Features
  811
- Configuration
  813
- Registers
  815
- Operation
  824
- Setting
  827
- Caution
  837
Chapter 40 Pulse Frequency Modulator

839
- PFM Overview
  839
- Reload Counter Registers
  842
- Reload Counter Operation
  846
- PFM Operation and Setting
  849
Chapter 41 Up/Down Counter

851
- Overview
  851
- Feature
  851
- Configuration
  852
- Register
  856
- Operation
  864
- Setting
  871
- Caution
  878
Chapter 42 Sound Generator

879
- Overview
  879
- Block Diagram
  880
- Registers
  881
Chapter 43 Stepper Motor Controller

887
- Overview
  887
- Registers
  888
- Operation
  897
- Caution
  899
Chapter 44 A/D Converter

901
- Overview of A/D Converter
  901
- Block Diagram of A/D Converter
  902
- Registers of A/D Converter
  903
- Operation of A/D Converter
  912
- Setting
  915
- Caution
  922
Chapter 45 D/A Converter

925
- Overview
  925
- Features
  925
- Configuration
  926
- Registers
  927
- Operation
  929
- Setting
  930
- Caution
  932
Chapter 46 Alarm Comparator

933
- Overview
  933
- Block Diagram
  933
- Alarm Comparator Control/Status Register (ACSR)
  934
- Operation Modes
  935
Chapter 47 LCD Controller

937
- Overview
  937
- Features
  937
- Configuration
  938
- Registers
  940
- Operation
  945
- Setting
  950
- Caution
  956
Chapter 48 Clock Monitor

957
- Overview
  957
- Features
  957
- Configuration
  958
- Register
  959
- Operation
  961
- Settings
  962
- Caution
  963
Chapter 49 Real-Time Clock

965
- Overview
  965
- Features
  965
- Configuration
  966
- Registers
  967
- Operation
  972
- Setting
  974
- Caution
  977
Chapter 50 Subclock Calibration Unit

979
- Overview
  979
- Block Diagram
  980
- Timing
  981
- Clocks
  982
- Register Description
  983
- Application Note
  989
- Power Dissipation
  990
Chapter 51 Low Voltage Reset/Interrupt

991
- Overview
  991
- Features
  991
- Registers
  992
Chapter 52 Regulator Control

995
- Overview
  995
- Features
  995
- Registers
  996
Chapter 53 Fixed Mode-Reset Vector / BOOT-ROM

999
- Overview
  999
- Check for Boot Conditions
  999
- Registers Modified by Boot ROM
  1004
- Flash Access Mode Switching
  1005
- Bootloader Update Strategy
  1006
Chapter 54 Flash Memory

1009
- Overview
  1009
- Features
  1009
- Configuration
  1010
- Registers
  1012
- Access Modes
  1012
- Flash Access Mode Switching
  1013
- Auto Algorithms
  1015
- Sector Erase
  1017
- Caution
  1023
Chapter 55 Flash Security

1025
- Overview
  1025
- Features
  1025
- Flash Security Vectors
  1026
- Register
  1029
Chapter 56 Electrical Specification

1033

Fujitsu Categories

Fujitsu MB91460 SERIES FR60 Manuals

Fujitsu MB91460 SERIES FR60 User Manual (1038 pages)

Table of Contents

Chapter 1 Introduction

Chapter 2 MB91460 Rev.a/Rev.b Overview

Chapter 3 MB91460 Series Basic Information

Chapter 4 CPU Architecture

Chapter 5 CPU Registers

Chapter 6 EIT: Exceptions, Interrupts and Traps

Chapter 7 Branch Instruction

Chapter 8 Device State Transition

Chapter 9 Reset

Chapter 10 Standby

Chapter 11 Memory Controller

Chapter 12 Instruction Cache

Chapter 13 Clock Control

Chapter 14 PLL Interface

Chapter 15 CAN Clock Prescaler

Chapter 16 Clock Supervisor

Chapter 17 Clock Modulator

Chapter 18 Timebase Counter

Chapter 19 Timebase Timer

Chapter 20 Software Watchdog Timer

Chapter 21 Hardware Watchdog Timer

Chapter 22 Main Oscillation Stabilisation Timer

Chapter 23 Sub Oscillation Stabilisation Timer

Chapter 24 Interrupt Control

Chapter 25 External Interrupt

Chapter 26 DMA Controller

Chapter 27 Delayed Interrupt

Chapter 28 Bit Search

Chapter 29 MPU / EDSU

Chapter 30 I/O Ports

Chapter 31 External Bus

Chapter 32 USART (LIN / FIFO)

Chapter 33 I2C Controller

Chapter 34 CAN Controller

Chapter 35 Free-Run Timer

Chapter 36 Input Capture

Chapter 37 Output Compare

Chapter 38 Reload Timer

Chapter 39 Programmable Pulse Generator

Chapter 40 Pulse Frequency Modulator

Chapter 41 Up/Down Counter

Chapter 42 Sound Generator

Chapter 43 Stepper Motor Controller

Chapter 44 A/D Converter

Chapter 45 D/A Converter

Chapter 46 Alarm Comparator

Chapter 47 LCD Controller

Chapter 48 Clock Monitor

Chapter 49 Real-Time Clock

Chapter 50 Subclock Calibration Unit

Chapter 51 Low Voltage Reset/Interrupt

Chapter 52 Regulator Control

Chapter 53 Fixed Mode-Reset Vector / BOOT-ROM

Chapter 54 Flash Memory

Chapter 55 Flash Security

Chapter 56 Electrical Specification

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